将S3C6410频率提升至666
<p>前两天看了S3C6410时钟部分代码，发现在Linux中没有设置时钟，时钟是u-boot中设置好的，Linux启动时直接读取PLL寄存器中的数据。<br/>刚才浏览了下u-boot中的smdk6410.h文件，发现调整时钟的宏三星已经定义好了：</p><p>//#define CONFIG_CLK_800_133_66<br/>#define CONFIG_CLK_666_133_66<br/>//#define CONFIG_CLK_532_133_66<br/>//#define CONFIG_CLK_400_133_66<br/>//#define CONFIG_CLK_400_100_50<br/>//#define CONFIG_CLK_OTHERS</p><p>将友坚6410的时钟升级的666只需要注释<br/>//#define CONFIG_CLK_532_133_66<br/>打开<br/>#define CONFIG_CLK_666_133_66<br/>再重新编译u-boot即可<br/>==================================================================================<br/>CPU: <a href="mailto:S3C6410@666MHz">S3C6410@666MHz</a><br/> Fclk = 666MHz, Hclk = 133MHz, Pclk = 66MHz, Serial = CLKUART (ASYNC Mode) <br/>Board: SMDK6410<br/>DRAM: 128 MB<br/>Flash: 0 kB<br/>NAND: 256 MB <br/>==================================================================================<br/>Uncompressing Linux.......................................................................................................................... done, booting the kernel.<br/>Linux version 2.6.24.2 (<a href="mailto:kyon@SEP4020.Linux">kyon@SEP4020.Linux</a>) (gcc version 4.3.2 (Sourcery G++ Lite 2008q3-72) ) #348 Wed Jul 29 15:26:11 CST 2009<br/>CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387f<br/>Machine: SMDK6410<br/>Ignoring unrecognised tag 0x00000000<br/>Memory policy: ECC disabled, Data cache writeback<br/>CPU S3C6410 (id 0x36410101)<br/>S3C6410: core 666.000 MHz, memory 133.000 MHz, peripheral 66.500 MHz<br/>S3C6410: EPLL 192.000 MHz<br/>S3C64XX Clocks, (c) 2007 Samssung Electronics<br/>==================================================================================<br/>Uncompressing Linux...................................................................................................... done, booting the kernel.<br/>Linux version 2.6.29 (<a href="mailto:kyon@SEP4020.Linux">kyon@SEP4020.Linux</a>) (gcc version 4.3.2 (Sourcery G++ Lite 2008q3-72) ) #48 PREEMPT Mon Jul 13 17:25:14 CST 2009<br/>CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387f<br/>CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache<br/>Machine: SMDK6410<br/>Memory policy: ECC disabled, Data cache writeback<br/>CPU S3C6410 (id 0x36410101)<br/>S3C24XX Clocks, (c) 2004 Simtec Electronics<br/>S3C64XX: PLL settings, A=666000000, M=532000000, E=24000000<br/>S3C64XX: HCLK2=266000000, HCLK=133000000, PCLK=66500000<br/>mout_apll: source is fout_apll (1), rate is 666000000<br/>==================================================================================</p><p><br/>仅仅知道如何修改当然是不够的，还要看看为什么这样改：</p><p>S3C6410的时钟公式基本上和S3C2410一样：Fclk=（m×Fin）/（p×(2^s)）<br/>Fin是外接晶振12MHz<br/>对于666主频，m=333，p=3，s=1，333*12/(3*2^1)=333*12/6=666<br/>在smdk6410.h中有如下定义，532和666的区别一目了然，其实就是APLL_MDIV一个是333一个是266而已</p><p>#if defined(CONFIG_CLK_666_133_66) /* FIN 12MHz, Fout 666MHz */<br/>#define APLL_MDIV 333<br/>#define APLL_PDIV 3<br/>#define APLL_SDIV 1<br/>#undef CONFIG_SYNC_MODE /* ASYNC MODE */</p><p>#elif defined(CONFIG_CLK_532_133_66) /* FIN 12MHz, Fout 532MHz */<br/>#define APLL_MDIV 266<br/>#define APLL_PDIV 3<br/>#define APLL_SDIV 1<br/>#define CONFIG_SYNC_MODE</p><p>#define APLL_VAL set_pll(APLL_MDIV, APLL_PDIV, APLL_SDIV)<br/>下面这个宏定义设置PLL的值</p><p>在board/samsung/smdk6410/lowlevel_init.S中有用到<br/> ldr r1, =APLL_VAL<br/> str r1, [r0, #APLL_CON_OFFSET] //这里写APLL_CON寄存器<br/> ldr r1, =MPLL_VAL<br/> str r1, [r0, #MPLL_CON_OFFSET] //这里写MPLL_CON寄存器</p><p> ldr r1, =0x80200203 /* FOUT of EPLL is 96MHz */<br/> str r1, [r0, #EPLL_CON0_OFFSET]<br/> ldr r1, =0x0<br/> str r1, [r0, #EPLL_CON1_OFFSET]</p><p> ldr r1, [r0, #CLK_SRC_OFFSET] /* APLL, MPLL, EPLL select to Fout */</p><p>>#if defined(CONFIG_CLKSRC_CLKUART)<br/>> ldr r2, =0x2007<br/>>#else<br/>> ldr r2, =0x7<br/>>#endif<br/>> orr r1, r1, r2<br/>><br/>> str r1, [r0, #CLK_SRC_OFFSET]<br/>><br/>> /* wait at least 200us to stablize all clock */<br/>> mov r1, #0x10000<br/>>1: subs r1, r1, #1<br/>> bne 1b</p><p>这样S3C6410的时钟就被初始化为666MHz了</p><p>说来我曾经在Linux初始化clokc的代码中强行将APLL_CON寄存器中的mdiv置为333<br/>val = 0xc14d0301; //原来是0xc10a0301 其中的14d就是333 10a为266 <br/>__raw_writel(val, S3C_APLL_CON);</p><p>结果初始化后就输出乱码的，不过LCD输出正常，看来uart的时钟和频率相关，需要修正。</p>[align=right][color=#000066][此贴子已经被作者于2009-8-18 16:43:53编辑过][/color][/align]
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